1. Technical Field
The present invention relates to a method for emulation of a target programmable unit, which has at least one central programmable unit (CPU), by means of an external emulation device, which is coupled to the target programmable unit by means of a communication link. The invention also relates to a programmable unit, which has at least one CPU and an emulation port as a communication link for transferring emulation data to an external emulation device. Furthermore, the invention relates to an emulation device having an emulation port for communication with an external target programmable unit for receiving emulation data, and to an apparatus for emulation of a programmable unit, comprising a target programmable unit and an emulation device.
2. Discussion of Related Art
The development of microcontrollers is accompanied by comprehensive functional testing. Error-free software operation on microcontrollers is critical in many application fields. For instance, microcontrollers are used in the control of automobile steering or engine control and perform functions that can be critical for the safety of car drivers and their passengers.
An important requirement for testing and certifying software is the provision of trace data, which gives information on individual operational steps performed during the execution of a computer program. A set of trace data comprises addresses of the processed code, optionally read and written data, CPU registers and associated time stamps.
In some applications it is indispensable to provide the trace data under real-time conditions. The retrieval of trace data from microcontrollers for such application purposes has been challenged by the progress of semiconductor technology in recent years. Such advanced microcontrollers are typically operated at clock frequencies between several 100 MHz up to 1 GHz. Furthermore, processor cores even of embedded systems become increasingly complex. Peripheral units such as display controllers, USB (Universal Serial Bus) host and slave controllers and fast Ethernet controllers have been integrated on-chip into the microcontroller devices, in addition to the on-chip integration of random access memory (RAM) and flash memory.
A further difficulty in the software development for an embedded system is that recent developments show an increase of the use of multicore microcontrollers. In a multicore-microcontroller, several identical or non-identical CPU cores are integrated on chip. This further complicates the retrieval of trace data, because trace data have to be monitored for every CPU core.
To obtain trace data some known solutions implement a trace-monitoring unit into the microcontroller. The trace-monitoring unit is an embedded special-purpose hardware, which traces a software application step by step and records relevant and detectable system states such as program addresses, register content and memory content. However, not all internal quantities of interest can be detected by an embedded trace-monitoring unit, given the limited space that can be allocated for this purpose and the limited monitoring capacity of an embedded trace-monitoring unit. In multicore microcontrollers using an embedded trace capture unit, a separate trace interface has to be provided for every CPU core.
Some microcontrollers provide a trace memory (also called trace buffer) for buffering a limited amount of trace data. However, the trace buffer is very limited in size and allows buffering the trace data for only a small amount of some 10 or 100 operations, which is comparable to a “snapshot” of trace data only. Therefore, the limitations in the trace buffer size lead to a loss of trace information that can be provided.
For a continuous transfer of trace data buffered in an on-chip trace buffer to an analyzing system some bandwidth is required for transmission via a corresponding interface. The bandwidth requirement can often only be met if the data stored in the trace buffer is reduced by filtering and if the CPU clock is decreased during recording the trace data.
Many microcontrollers comprise a standardized JTAG (Joint Test Action Group) interface. The JTAG interface usually serves for testing and debugging purposes. The JTAG interface is sometimes also used for providing trace information from an embedded trace-monitoring unit or trace buffer to an external analyzing system. However, the JTAG interface is neither available nor suitable for continuous transmission of large amounts of trace data. Since this solution thus often does not provide a suitable bandwidth, for instance for real-time transmission of the trace information to an external analyzing system, a real-time execution of a computer program for testing purposes is not possible, which renders this testing technology unsuitable for some applications. Some microcontrollers provide a dedicated trace adaptor for reading from the trace buffer. While this allows increasing the depth of trace information, such microcontrollers with special trace adaptors require additional pins and chip core area and are also too expensive in mass production. It has also been observed that this technique is less suitable for testing at very high processing speeds.
Bond-out-chip based in-circuit emulators (ICE) provide a better performance but also represent the most expensive technique to retrieve trace data. Bond-out-chip based in-circuit emulators usually take the form of a special test version of the target microcontroller under test, a so-called bond-out chip, which allow access to all relevant internal signals via dedicated pins. This allows monitoring and storing certain register content in real time for the purpose of debugging.
However, bond-out chips are very expensive. The additional design and production steps involved in the fabrication of a bond-out-chip induce a delay in the development process of the microcontrollers. These disadvantages are multiplied in the development of a microcontroller series exhibiting derivatives with design variations for different application purposes.
Clock rates in bond-out-chip based ICE debugging are typically limited to values of up to 50 MHz, which is a disadvantage for many applications, which require testing under real-life conditions with clock rates of up to 1 GHz.
A further disadvantage of bond-out-chip based in-circuit emulators is that the software development is performed on evaluation chips with a special design, which is different from the design of those chips, which will eventually be fabricated in mass production.
From WO 2006/117377, which is incorporated herein by reference in its entirety, a procedure and a device for emulating a programmable unit are known, in which desired trace date is not taken from the target CPU directly, but is determined and made available by a replication of this target CPU by an external and separate emulation device. The emulation of a target programmable unit by means of the external emulation device comprises transferring predetermined initialization data through a communication link to the emulation device. The initialization data is data that the target programmable unit has used for initializing itself. A CPU clock signal of the target programmable unit and the following data is transferred through the communication link in a defined relationship with the CPU clock signal: data read by the CPU from a data bus of the target programmable unit, and those external events that have an influence on the program counter. Additional data can be transferred in special embodiments, such as events that trigger a data transfer by passing the CPU, periodically created complete or partial copies of the register memory, or one or more data type signals. The target programmable unit is emulated in the external emulation device using the transferred emulation data. Trace data are ascertained from the emulation in the external emulation device and stored and/or output for subsequent analysis.
The technique of WO 2006/117377 A1 reduces the required bandwidth for data transmission between the target microcontroller and the analyzing system, because it only requires transmitting the small amount of emulation data mentioned to the emulation device during emulation. It further allows a simpler structure of the data output from the target programmable unit, which reduces the required chip area and the fabrication cost.
In contrast to the use of ICEs, which run with a bond-out chip and also require a new bond-out chip for each new microcontroller derivative with different peripherals, the technology of WO 2006/117377 A1 only requires a copy of the CPU core, i.e., arithmetic-logic units (ALUs), controller logic, bank of registers, pipeline, etc. An emulation of the internal peripherals of the target microcontroller, such as analog-digital converters, UART, CAN, etc. is not required.
However, it would be desirable to improve this technology in order to prevent that the CPU of the emulation device executes code different from that of the target CPU. To this end, such situations must be reliably detected.